Questions
5 questions on average per paper
Difficulty
Medium
Importance
High yield for HPCL/NTPC
Overview
Digital Electronics and Microprocessors form the backbone of control systems and computational logic in modern electrical and electronics engineering. For PSU exams, mastering Boolean simplification, combinational logic design, and microprocessor instruction sets is essential for securing high-frequency marks.
Number Systems & Boolean Algebra
This section involves binary, octal, hexadecimal conversions and the application of Boolean theorems to simplify digital circuits. It is the fundamental layer required to solve logic-based problems efficiently.
- De Morgan's Theorems: (A+B)' = A'B' and (AB)' = A'+B'
- Universal Gates: NAND and NOR implementations
- SOP and POS standard forms
- K-Map simplification up to 4 variables
- 1's and 2's complement arithmetic
Logic Gates & Combinational Circuits
Combinational circuits produce outputs solely dependent on current inputs, making them predictable but essential for data processing. Focus on the internal structure of MUX, DEMUX, Encoders, and Decoders.
- Half and Full Adder/Subtractor logic
- Multiplexer as a universal logic function generator
- Decoder expansion using smaller units
- Truth table identification for common gates
- Hazard identification in logic circuits
Sequential Circuits
Unlike combinational circuits, sequential circuits utilize memory elements to store state information. Mastery of Flip-Flop excitation tables is critical for analyzing counters and shift registers.
- Excitation tables for SR, JK, D, and T Flip-Flops
- Race-around condition in JK Flip-Flop
- Synchronous vs Asynchronous (Ripple) counters
- Mod-N counter design logic
- Shift register classification: SISO, SIPO, PISO, PIPO
8085 Microprocessor Architecture
This topic covers the internal registers, addressing modes, and the instruction set of the 8-bit Intel 8085. Exam questions often target flag status after arithmetic operations and bus cycles.
- ALU, Accumulator, and Status Flags (CY, AC, P, S, Z)
- Addressing modes: Immediate, Register, Direct, Indirect
- Hardware interrupts: TRAP, RST 7.5, 6.5, 5.5, INTR
- T-states, Machine cycles, and Instruction cycles
- Memory interfacing: Address decoding logic
Formula Sheet
Boolean: A + A'B = A + B
Mod-N counter max states = 2^n
T-state Calculation: Instruction Cycle = Sum of T-states
Fan-out = I_OH / I_IH
Exam Tip
Prioritize memorizing the excitation tables for JK and D flip-flops, as these are the keys to solving almost all sequential circuit analysis questions.
Common Mistakes
- Miscalculating the number of states or modulo value in counter design problems.
- Forgetting the state of status flags after specific instruction executions in 8085 assembly.
- Confusing the priority levels and masking capabilities of 8085 hardware interrupts.
More Revision Notes
Ready to test yourself?
Play topic-wise Digital Electronics & Microprocessors questions in Aspirant Arcade — gamified MCQ practice.
Download Free